Resume

• Designed cryotherapy spray gun (hardware and firmware).
• Designed a touch control panel for building energy management (firmware and hardware). Design included manufacturing test/calibration fixture and supporting utility software program.
• Designed a wireless set of thermal imaging cameras based on Lepton 3.5 and ESP32.
• Designed a 50 watt MPPT based solar charger with a LoRaWAN interface capable of supporting both Lead Acid and LiFePO4 battery chemistries.
• Designed a time-lapse camera for scientific research with two imagers, a visual and LWIR thermal for a U.S. Forest Service scientist researching the energy output and distribution of burning trees. Records radiometric data to a json-structured file for post-event analysis. Includes a WiFi interface and remote access capability. Wrote a companion application for Windows and OS X to control the camera remotely.
• Designed hardware and firmware for a a second generation hydration system using a Nordic RF/CPU. Ultra low-power transmitter with two-way communication to backpack-mounted pump. Designed manufacturing test fixtures and software for programming and serialization.
• Designed a low-cost solar power system for IOT devices using a Silicon Labs EFM8SB micro-controller implementing a MPPT algorithm, buck converter control and system functionality. Wrote supporting Arduino library, Linux utility and daemon programs, and a desktop PC (Win, Mac, Linux) display and graphing program. Designed and wrote firmware for a manufacturing test fixture to test, program and calibrate each board in less than ten seconds. Successful crowd funding campaign through Crowd Supply.
• Wrote firmware for a NRF24LE1-based USB dongle to perform RF channel analysis for a client. Wrote desktop application that reads data from the dongle for real-time analysis.
• Designed generic LED sculptural controller board with 32-bit ARM CPU, sensors and selectable power input and expandable IO for multiple art installations. Designed manufacturing test fixture and firmware for board production.
• Designed ultra-low power motion sensor including hardware and firmware for remote security applications.
• Designed BLE heart rate monitoring system with visual display and audio sound-effect queuing for an experimental Paris ballet.
• Designed hardware including controller and power supply for hanging art installation.
• Designed hardware and wrote firmware for a 2.4 GHz wireless water hydration system for motocross racers. Built manufacturing programming fixture.
• Wrote firmware to control visual effects on a large art installation controlling over 11,000 RGB LEDs.
• Designed hardware, wrote firmware and linux utilities for a Pi Zero expansion board allowing solar or AC-DC PSU charging of a Li-Po battery to power the Pi and accessories. Provide USB and ethernet expansion, PWM outputs, analog inputs. Designed, built and programmed manufacturing programming and test fixture.
• Wrote firmware, reusing a previous hardware, to control visual effects on an interactive laser harp musical system.
• Designed an electrically isolated LED strip driver to remotely control WS2812 LED strips from a fade candy. Circuit design, PCB layout, project management, embedded linux system configuration and installation.
• Designed a universal AC/DC input shield for Raspberry Pi with switched USB, real-time clock, temperature monitor and board configuration EEPROM. Circuit design, PCB layout and prototyping.
• Designed a capacitive touch-sensitive control device with digital and analog outputs for danjuliodesigns. Circuit design, PCB layout and firmware.
• Designed a new LED control board for a pixel addressable strips using a Teensy 3.1 micro-controller, XBee radio interface and misc logic. Wrote the controlling firmware in C. Wrote a utility control program using the Xojo development environment.
• Designed a battery powered LED device with remote control using the Nordic nrf24LE1. Provided circuit design, PCB layout and firmware development services. Designed two manufacturing test fixtures for programming.
• Designed a set of programmers for the Nordic nrf24LE1 and supporting software running on PCs, OS X and Linux using the Xojo development environment.
• Designed an equine heart rate monitor and telemetry prototype system. Circuit design using existing modules and custom circuitry. Wrote the controlling firmware in C.
• Designed a small, battery powered decorative LED controller for both white and RGB applications. Provided circuit design, PCB layout and firmware development services.
• Ported firmware to a new video diversity receiver.
• Designed a LED control board combining a buck regulator, high-current switches, Arduino and Xbee transceiver for an artist’s LED sculpture.
• Developed low-cost distributed control architecture for traditional and color capable light fixtures.
• Architected wireless protocol for device control using low-power 2.4 Ghz ISM-band transceivers.
• Designed multiple color-wash LED controllers, bridge interfaces and associated wired and hand-held remote control devices.
• Developed distributed client/server control system using Java and C++ on Windows, linux, embedded linux and Mac OS X platforms.
• Built many micro-controller based internal test tools.
• Designed and built a prototype remote heart rate monitoring system.

• Managed production including contract manufacturing. Designed manufacturing process including production support software.
• Implemented commerce capable website.
• Designed marketing program including collateral material.

• Elected to board-of-directors: 2013, 2014, 2017, 2019.
• Proposed and oversaw successful management restructuring to support growth and continuity of operations.
• Worked on committee to create Liability and Membership agreement documentation.
• Implemented RFID access control system.
• Installed color wash lighting system (and a second, updated, version).
• Participated in RedBull 2013 Make competition.

• Developed System Verilog and PSL assertions as part of a test process for a new analysis tool.
• Developed PCI Express ASIC verification product. Implemented Verilog, C and C++ components of a verification model and protocol checker with associated documentation, test benches and test programs.
• Managed outsourced PCI Express protocol compliance monitor project including project definition, architecture, review, validation and final documentation/productization.
• Ported two large C/C++ projects to operate under 64-bit Solaris and RHEL 3.0 using GCC compilers and tools.
• Provide product support for several verification models.

• Implemented module level test bench for a Network Processor ASIC using Cadence Test Builder to develop C++ Transaction Verification Modules and System C to develop cycle accurate behavioral models.
• Developed system level test bench for an IP-over-SONET ASIC using Verisity Specman. Developed stimulus generator and protocol monitor for SPI-3 and POS PHY 2 interfaces.

• Provided input into development of a Java pseudo-random automated test generator. Developed concept of model driver to interface test generator to HDL-based verification models, protocol monitors and test benches.
• Team lead for continued development, testing and release of PCI verification environment. Architected and began development of PCI/PCI-X verification models and protocol monitor. Created model driver to interface Java pseudo-random test generator to PCI /PCI-X models and protocol monitors.
• Provided integration support for customers.

• Provided management, budgeting and system administration functions for the company.
• Architected and implemented a Verilog-based highly configurable pseudo-random test case generator for a Pentium Pro simulation model
• Architected and developed a PCI verification environment (Verilog with C PLI). Components include test bench, master/slave bus functional model, protocol monitor, vector capture/verification module, pseudo-random simulation test case generator and a detailed set of directed regression tests.
• Developed psuedo-random verification environment for an 8-way multiprocessor ASIC set.
• Investigated dynamically re-programmable FPGA technology and integrated microprocessor logic as a vehicle to provide “software” based IO interfaces.
• Developed directed regression environment and tests for a ring-based multi-node PCI bridge ASIC.

• Wrote and debugged Verilog and Intel simulation test cases for a Pentium based multiprocessor CPU on a proprietary GTL split-transaction bus.
• Developed Verilog random test case generator as part of a simulation environment for a PCI interface ASIC. All ASICs were fully functional with first pass silicon.
• Supported 3rd party Pentium Pro simulation model.
• Designed hardware and firmware for an Orthopedic Limb Load Monitor.
• Developed firmware test suites and verified firmware operation in accordance with FDA requirements for a class 2 medical device.

• Project Leader for all aspects of the development and introduction of a new line of commercial SMP UNIX servers.
• Primary architect for the system, including RAS features for the commercial market.
• Architect and lead engineer for a new SBus based I/O subsystem.
• Hardware Department Manager for 10-12 people including board level designers, ASIC designers and technicians.
• Hands on project management of several programs (second generation desktop workstation, quick turn of CPU board, new VME I/O board, technology board).
• Graphics Hardware Group Manager for five hardware engineers (board and ASIC) and provided project leadership for graphics subsystem development.
• Managed fast-track development of a low-end accelerated color frame buffer. From start of project to functional prototype took only 2.5 weeks. Board was in production in less than 3 months.
• Project lead and primary architect for a family of 2-D and 3-D graphics cards with responsibility for hardware, microcode, device drivers and diagnostics.
• Lead engineer and architect for one of three ASIC designs. Responsible for algorithm design and simulation.
• Team lead for a group of engineers designing Sun compatible monochrome and color graphics cards for Solbourne multiprocessor systems.
• Designed a computer controlled stimulus/monitor board capable of executing all transaction types on a proprietary cache-coherent multiprocessor bus.

• Member of a hardware design team responsible for the development of a family of 2-D graphics subsystems used in HP workstations.
• Implemented a graphics rendering ASIC. Responsible for algorithm development and verification, gate-level design of portions of the ASIC, C-code RTL level functional simulator, functional and production test vectors and hardware debug.
• Wrote C-code test routines for verification of the HP Starbase graphics library.
• Wrote a suite of demonstration programs used to show the performance and features of the graphics subsystem at Siggraph 87.